Method of manufacturing a semiconductor device

ABSTRACT

In the method of manufacturing a semiconductor device ( 1 ) with a semiconductor body ( 2 ), a doped zone ( 3 ) is formed in the semiconductor body ( 2 ). The semiconductor body ( 2 ) has a crystalline surface region ( 4 ), which crystalline surface region ( 4 ) is at least partly amorphized so as to form an amorphous surface layer ( 5 ). The amorphization is achieved by irradiating the surface ( 6 ) with a radiation pulse ( 7 ) which is absorbed by the crystalline surface region ( 4 ). The radiation pulse ( 7 ) has a wavelength which is chosen such that the radiation is absorbed by the crystalline surface region ( 4 ), and the energy flux of the radiation pulse ( 7 ) is chosen such that the crystalline surface layer ( 5 ) is melted. The method is useful for making ultra-shallow junctions.

The invention relates to a method of manufacturing a semiconductordevice with a semiconductor body, in which method a doped region isformed in the semiconductor body, which semiconductor body comprises acrystalline semiconducting surface region of semiconductor material,while at least a portion of said crystalline semiconducting surfaceregion is amorphized so as to form an amorphous surface layer.

U.S. Pat. No. 5,908,307 discloses a method in which source and drainjunctions of a MOSFET are manufactured. The source and drain junctionsare manufactured in an Si semiconductor body and are very shallow,typically less than 100 nm deep. Shallow junctions are manufacturedthrough amorphization of the surface, the provision of dopant atoms, andactivation and diffusion of the dopant atoms. An amorphous surface layeris formed for preventing channeling during implantation of the dopantatoms. In the amorphization step, the desired depth of the amorphoussurface layer is adjusted through ion implantation of an electricallyinert ion such as argon, silicon, or germanium. The crystallinesemiconducting surface layer is amorphized as a result of collisions ofthe ions and energy dissipation, and an amorphous surface area isformed. Since Ge is a comparatively heavy atom, abruptamorphous-crystalline interfaces can be manufactured in this manner.Seen from the surface, damage will be present deeper down in thecrystalline semiconductor body below the amorphous surface layer, theso-called end-of-range damage.

A problem of the known method is that interstitials and vacancies arisein the amorphization step owing to the implantation of ionized inertatoms. The interstitials present at the amorphous-crystalline interfacecause an increased diffusion of dopant atoms, especially of B and P.This transient-enhanced diffusion renders steep doping profilespractically impossible. In addition, the end-of-range damage causesdislocation loops during annealing, which give rise to junction leakage.

It is an object of the invention to provide a method of manufacturingthe semiconductor device of the kind mentioned in the opening paragraphwhereby an amorphous surface layer is obtained substantially withoutdamage in the semiconductor body.

This object is achieved in the method according to the invention in thatthe amorphization is carried out through irradiation of the surface witha radiation pulse which is absorbed by the surface region, which has awavelength which is chosen such that the radiation is absorbed by thecrystalline surface region, and whose energy flux is chosen such thatthe crystalline surface layer is melted thereby.

The energy of the photons of the radiation pulse is transmittedsubstantially instantaneously to the crystal lattice after the photonshave been absorbed, with the result that the surface layer is indeedmelted, but no thermal equilibrium has yet established itself. Themolten surface layer is in direct contact with a comparatively coldsemiconductor body. This induces a strong heat flux to the semiconductorbody, so that the molten semiconductor material cools down very quickly.It is essential for the molten semiconductor material to cool down tobelow the equilibrium melting point value of the amorphous semiconductormaterial at a rate faster than the rate at which recrystalization occursat the interface between the semiconductor body and the moltensemiconductor material. The supercooled semiconductor material turnsinto amorphous material before the semiconductor material can growepitaxially from the semiconductor body in the direction of the surface.An amorphous surface layer is created thereby.

No interstitials or vacancies are present at the amorphous-crystallineinterface, in contrast to the known method. There is no end-of-rangedamage in the crystalline semiconductor such as is caused byamorphization by implantation. The absence of damage of any kind rendersit possible to form doped zones with steep profiles such as, forexample, pn or np junctions.

Dopant atoms will usually be provided in the amorphized surface layerafter this. The dopant atoms may be provided, for example, by ionimplantation or by diffusion from an auxiliary layer on the surface. Ifion implantation is used, the implantation dose determines the number ofdopant atoms per cm², and the energy determines the depth of theimplanted dopant atoms. It is important for the implantation depth ofthe dopant atoms to lie in the amorphized surface layer. Damage causedby the implantation, such as interstitials, vacancies, and clusters ofsuch defects, will not lie in the crystalline semiconductor body as inthe known method, but are trapped in the amorphized surface layer. Theamorphous surface layer absorbs as it were the implantation damage.

Subsequently, at least a portion of the amorphized surface layer isheated to a temperature at which the dopant atoms are activated.

There are basically two methods by which this can be achieved: by solidphase epitaxy (SPE) below the melting temperature, or by liquid phaseepitaxy (LPE) above the melting point. In either case there will be noimplantation-related damage in the silicon, so that shallower junctionscan be formed with reduced junction leaks.

Preferably, solid phase epitaxy is used for activating the dopant atoms.Epitaxial recrystallization of the amorphous surface layer from thesolid phase can be induced through heating of the semiconductor materialto below the melting point by means of, for example, furnace heating,rapid thermal annealing (RTA), or irradiation of the surface with alaser. The minimum temperature required for epitaxial recrystallizationis approximately 550° C. for amorphous Si. Implanted dopant atoms aresubstitutionally incorporated during this recrystallization step,whereby activation takes place. The diffusion of the dopant atoms may belimited through the use of low crystallization temperatures. Since solidphase epitaxy is a non-equilibrium process, it is also possible to passthe solubility limit. Shallow, strongly activated junctions may be madein this manner.

Alternatively, liquid phase epitaxy may be used for activating thedopant atoms. In view of the fact that the amorphous semiconductormaterial has a lower melting point, the amorphous surface layer can bemelted without melting the subjacent semiconductor material of thesemiconductor body. The dopant atoms diffuse into the molten surfacelayer during this step. Since the diffusion coefficient of dopant atomsin the liquid phase is greater than that in the solid phase by manyorders of magnitude, the dopant atoms will be redistributedsubstantially uniformly within the molten depth, whereby an abruptjunction is formed. Cooling down then takes place to a temperature atwhich the amorphous surface layer recrystallizes. This is possiblebecause the molten semiconductor material recrystallizes in a directionaway from the subjacent semiconductor body.

Since the amorphous surface layer has absorbed the implantation damage,there is no transient-enhanced diffusion, and dislocation loops or otheragglomerations of defects arising at high temperatures owing to theend-of-range damage are absent. A junction is formed with steep dopingprofiles. Junction leakage has been strongly reduced by the absence ofdislocation loops in the depletion region of the junction.

Preferably, the crystalline surface layer is amorphized throughirradiation with an excimer laser providing a short laser pulse of, forexample, 1 ns or shorter. Lasers with short wavelengths, such as a KrFexcimer laser with a wavelength of 248 nm, or an ArF excimer laser witha wavelength of 193 nm, have a comparatively small absorption length, sothat they are highly suitable for uniform heating of a surface layer,especially at high powers.

The use of a laser pulse of typically 1 ns or shorter means that thesurface layer is indeed melted, but a thermal equilibrium has not yetestablished itself. The molten surface layer is in direct contact with acomparatively cold semiconductor body. This causes a strong heat fluxtowards the semiconductor body, whereby the molten semiconductormaterial becomes supercooled. The viscosity of the liquid semiconductormaterial rises strongly owing to the strong cooling down. The absence ofnucleation sites in the liquid phase transforms the supercooledsemiconductor material into amorphous semiconductor material when thetemperature falls to below the glass temperature of the amorphoussemiconductor material.

The amorphous surface layer can be formed in a controlled manner to adepth of approximately ten to a few times ten nanometers, depending onthe laser energy density and pulse duration. The depth of the layeramorphized by the laser determines the eventual junction depth to a highdegree. The choice of the laser energy density and the pulse durationfor the amorphizing step are accordingly determining factors for thedepth of the pn junction which can be formed in this procedure.

Since the melting dynamics are dependent on the absorbed energy and noton the incident energy, it is advantageous to reduce strongly anyreflections at the surface, which are caused inter alia by topographydifferences or by changes in roughness of the surface during melting, bymeans of an absorption layer. It is advantageous to provide anabsorption layer for the relevant wavelength of the laser light so as toachieve a uniform absorption of the laser light and a uniform heattransfer at the area of inter alia the pn junction. The absorption layermay be patterned so as to provide a possibility of local heating. Theradiation is absorbed better in the location where the pattern isprovided, so that the temperature of the surface layer rises locally.

The semiconductor body usually comprises semiconductor devices, such asMOSFET transistors, bipolar transistors, or diodes. The semiconductordevices will usually be isolated during the manufacture of asemiconductor circuit, so that differences in topography are present.

The semiconductor device may be, for example, an integrated circuit (IC)with logic, a memory, or optical components. The IC may be used, forexample, in mobile telephones, telecommunication networks, or a personalcomputer.

These and other aspects of the device according to the invention will bedescribed in more detail with reference to the drawings, in which:

FIG. 1 shows a sequence of steps in the method of manufacturing thesemiconductor device, FIGS. 1 a to 1 c showing cross-sections of theintermediate products;

FIG. 1 a is a cross-sectional view of the intermediate product afteramorphization of the surface layer;

FIG. 1 b is a cross-sectional view of the intermediate product afterimplantation of dopant atoms into the amorphous surface layer;

FIG. 1 c is a cross-sectional view of the intermediate product afteractivation and diffusion of the dopant atoms;

FIG. 2 shows a sequence of steps in the method of manufacturing thesource and drain junctions in a MOSFET:

FIG. 2 a is a cross-sectional view of the intermediate product in whichthe gate, source, and drain junctions are covered by an absorptionlayer;

FIG. 2 b is a cross-sectional view of the intermediate product in whichthe source and drain junctions are amorphized by a laser pulse;

FIG. 2 c is a cross-sectional view of the intermediate product in whichthe source and drain junctions are implanted into the amorphous surfacelayer;

FIG. 3 shows a sequence of steps in the method of manufacturing thesource and drain extensions in a MOSFET:

FIG. 3 a is a cross-sectional view of the intermediate product in whicha structure with a gate, source, and drain junctions and spacers is thestarting point;

FIG. 3 b is a cross-sectional view of the intermediate product in whichthe spacers are removed; and

FIG. 3 c is a cross-sectional view of the intermediate product in whichthe gate, source, and drain junctions are covered by an absorptionlayer, and the surface is irradiated with a radiation pulse.

FIG. 3 d is a cross-sectional view in which the source and drainjunctions of the MOSFET have been formed.

In the method of manufacturing a semiconductor device 1 with asemiconductor body 2 as shown in FIG. 1, a doped region 3 is formed inthe semiconductor body 2. The semiconductor body 2 comprises acrystalline semiconducting surface region 4 of semiconductor material.At least a portion of the crystalline semiconducting surface region 4 isamorphized so as to form an amorphous surface layer 5. The semiconductormaterial of the semiconductor body 2 may be, for example, Si, Ge, or acompound of Si and Ge. The semiconductor body may alternatively be asilicon-on-insulator (SOI) wafer, or a layer of semiconductor materialprovided on a substrate of, for example, ceramic material or glass.

FIG. 1 a starts with a crystalline surface layer 5 of semiconductormaterial, which crystalline surface layer 5 is amorphized so as to forman amorphous surface layer 5. The amorphization is carried out throughirradiation of the surface 6 with a radiation pulse which is absorbed bythe surface region 4, which radiation has a wavelength chosen such thatthe radiation is absorbed by the crystalline surface region 4, while itsenergy flux is chosen such that the crystalline surface layer 5 ismelted thereby.

In the embodiment shown, the surface of an Si semiconductor body 2 isirradiated with a radiation pulse 7 having a wavelength of 248 nm from aKrF excimer laser. The crystalline silicon surface 6 is irradiated for15 ps with an energy density of 100 mJ/cm². The crystalline Si is meltedover a depth 9 of approximately 30 nm. The short pulse duration meansthat the semiconductor body 2 is substantially not heated, and the heatflux to the semiconductor body 2 is typically higher than 10¹⁰ K/s. Theheat flux is quickly discharged, inter alia because of the comparativelyhigh coefficient of thermal conduction of Si. An amorphous upper layer 5is formed because the amorphization rates in Si are typically muchhigher than 15 m/s and the epitaxial recrystallization rate is only ofthe order of 5 to 15 m/s. The depth 9 of the amorphous Si surface layer5 in the embodiment shown is approximately 30 nm.

A doped zone 3 is subsequently formed in FIG. 1 b through implantationof dopant ions 8. The dopant ions 8 may be, for example, As, P, Sb, B,or In. The projected range 14 of the dopant ions lies in the amorphoussurface layer 5 during the implantation. The implantation damage isabsorbed in the amorphous surface layer 5 owing to the fact that theimplantation takes place in this amorphous surface layer 5, so that theamorphous-crystalline interface 15 remains free from damage.

In the embodiment shown, B ions are implanted with an energy of 1 keVand an implantation dose of 1×10¹⁵ at/cm². The projected range 14 of theimplanted ions is typically smaller than 25 nm in the embodiment shownfor the following energy levels: 0.5 keV B, 2 to 5 keV As, 1 keV P, 5 to10 keV Sb, while the implantation dose is typically chosen to be between3×10¹⁴ and 3×10¹⁵ at/cm². Curve a in FIG. 1 b represents the implanteddoping concentration as a function of the depth 9 in the amorphoussurface layer 5.

In FIG. 1 c, the doping atoms 8 are activated in a rapid thermalannealing process in the embodiment shown. The semiconductor body 2 isvery quickly heated in an RTA by a so-termed spike anneal, and is cooleddown again substantially immediately afterwards. In the embodimentshown, the B atoms are heated at 1000° C. for approximately 1 second,and immediately cooled down again. The concentration profile of thedopant atoms after heating remains substantially identical to theimplanted doping profile thanks to the absence of damage, as is shown bycurve B. There is accordingly substantially no diffusion owing to theabsence of damage. During cooling down, the Si recrystallizes from theamorphous-crystalline interface 5 in the direction of the surface 6, andB atoms are incorporated substitionally in the lattice sites in the Si.A very shallow doped p-type region 3 is formed with a depth 9 ofapproximately 30 nm.

Alternatively, the B doping may be activated by a laser anneal for 30 nsat 500 mJ/cm² with a 248 nm KrF laser. The comparatively high energyflux and the comparatively long pulse duration cause the amorphizedsurface layer 5 to melt. The diffusion coefficient of the dopant atomsin the liquid phase is greater by several orders of magnitude than inthe solid phase. Thus, for example, the diffusion coefficient of B in Siis greater in the liquid phase than in the solid phase by approximately8 orders of magnitude. The distribution of the dopant atoms 8 issubstantially uniform throughout the molten surface layer 5 in thiscase. Since the heat cannot be removed quickly enough, recrystallizationoccurs after melting, starting from the amorphous-crystalline interface15 in the direction of the surface 6 of the semiconductor body 2.

The dopant atoms 8 are substitutionally incorporated in the latticesites during recrystallization, so that they become electrically active.Given the above pulse duration and energy flux, the p-type junction hasa depth 9 of approximately 30 nm with an extreme steepness ofapproximately 0.2 nm per decade. The comparatively very low sheetresistance of 200 ohms/square indicates that practically all B atoms arepresent substitutional into the Si lattice and are accordinglyelectrically active. The junction thus obtained is extremely shallowwith a high electrical activation and a low sheet resistance.

In the embodiment shown in FIG. 2, the semiconductor device is a MOSFET11. The method starts with a Si semiconductor body 2 which is providedwith an n-well 16, isolation 17, a gate dielectric 25, and a gate 18,for example made of polysilicon, all formed in a manner known to thoseskilled in the art.

An absorption layer 10 for the radiation is provided at the surface 6 ofthe semiconductor body 2 with the gate 18. The absorption layer 10 forthe laser radiation of 248 nm is formed by 12 nm TEOS and a multilayerof 20 nm Ti/TiN in this embodiment. The surface is subsequentlyirradiated with a radiation pulse 7.

In the embodiment shown in FIG. 2 a, the surface is irradiated for 15 pswith an energy density of 50 mJ/cm² by means of a 248 nm KrF excimerlaser. The source 12 and drain 13 regions are amorphized thereby to adepth 9 of 15 nm.

In FIG. 2 b, the Ti/TiN multilayer is subsequently removed. The Ti/TiNmultilayer is removed, for example, by chemical etching in a solutioncomprising fluorine, or by reactive ion etching in a plasma of, forexample, He/SF₆.

It is important that the absorption layer 10 should be removed so as toprevent metal atoms from entering the semiconductor body 2 during theimplantation.

In FIG. 2 c, subsequently, the dopant atoms 8 are provided in theamorphous surface layer 5. In the embodiment shown, B ions are implantedinto the amorphous surface layer 5 at an energy of 0.5 keV with a doseof 1×10¹⁵ at/cm². An implantation mask 19, for example a resist, is usedfor implanting the B atoms only in the source 12 and drain 13 regions ofthe relevant p-type transistor. After the implantation the resist mask19 is removed. The dopant atoms are activated in a rapid thermalannealing (RTA) process.

The semiconductor body 2 is heated very quickly by means of a so-termedspike anneal in an RTA and is cooled down again substantiallyimmediately after this. In the embodiment shown, the B atoms are heatedat 1000° C. for 1 second, after which they are cooled down immediately.

The doped p-type region 3 has a depth of approximately 15 nm. The dopingprofile has an extreme steepness of 0.2 nm per decade. The comparativelylow sheet resistance of 200 ohms/square indicates that practically all Batoms are present substitutional into the Si lattice and are accordinglyelectrically active.

It is especially p-channel MOSFETs manufactured by the known methodwhich suffer much from short-channel effects owing to B tails in thesource 12 and drain 13 regions caused by implantation damage.Transient-enhanced diffusion of B occurs during the activation of thedopant atoms at a comparatively high temperature, which causes the Btails. Steep source and drain junctions cannot be very well manufacturedby the known method as a result of this. By contrast, the source anddrain junctions manufactured by the method according to the inventionhave a very shallow depth, so that also the lateral diffusion is verysmall. This makes the influence of the source and drain on the length ofthe channel comparatively small. Short-channel effects are reduced bythe method according to the invention. The method according to theinvention is accordingly highly suitable for MOSFETs with very smallchannel lengths of typically 40 nm.

Alternatively, as shown in FIG. 3, the source 12 and drain 13 junctionsmay be provided with extensions which have a very small depth and a highdegree of activation. The source and drain extensions 20, 21 are ofgreat importance for minimizing short-channel effects such asdrain-induced barrier lowering (DIBL) and punch-through. In thisarrangement, the series resistances are present mainly in the source anddrain extensions, while the deeper source 12 and drain 13 junctions willeventually be silicided so as to reduce the series resistance.

The very shallow source and drain extensions 20, 21 are favorable forsuppressing short-channel effects, while the high degree of activationcontributes to a reduction in the series resistance of the MOSFET.

FIG. 3 a starts with a MOSFET process known to those skilled in the art,with deeper source 12 and drain 13 junctions manufactured, for example,by means of ion implantation and diffusion in an RTA.

Optionally, pockets 22 may be provided by ion implantation. Thesepockets 22 serve to reduce the depletion regions of the source 12 anddrain 13 when the transistor is in operation. The doping of the pocketsis usually higher because of this and of the same type as the doping ofthe well (n-type in this case).

In FIG. 3 b, the spacers 23 are removed. The spacers are made, forexample, of silicon nitride and can be chemically etched with H₃PO₄.

In FIG. 3 c, an absorption layer 10 is subsequently provided, consistingof 12 nm TEOS and a multilayer of 20 nm Ti/TiN. Then the shallow sourceand drain extensions 20, 21 are formed by the method according to theinvention. The irradiation of the surface as described above is used. Anamorphous surface layer 5 with a very small depth 9 is created thereby.

The absorption layer 10 is removed, whereupon the source and drainextensions 20, 21 and the gate 18 are implanted (see FIG. 3 d).

The dopant atoms are subsequently activated in the manner describedabove, for example by rapid thermal annealing or laser annealing.

A major advantage is that an extremely good activation of the dopantatoms is achieved in this last step, and no comparativelyhigh-temperature steps are necessary any more in the subsequent process,which would lead to deactivation of the dopant atoms. The goodactivation of the dopant atoms causes the sheet resistance of the sourceand drain extensions and the resistance of the source and drain andpolycrystalline silicon to be comparatively low. Comparatively muchcurrent flows between the source and the drain of the MOSFETmanufactured in accordance with the invention as a result of this.

It is noted that the invention is not limited to the examples describedabove and may be used for all types of diodes, among them light-emittingdiodes (LEDs), bipolar transistors, or other heterostructure bipolartransistors, memory cells such as flash, EEPROM, etc. In addition, theinvention is not limited to p-type transistors and may equally well beused for n-type transistors. Neither is the method limited to silicon;it may also be used for germanium and for compounds comprising Ge andSi.

The specific dimensions and materials of the specific embodiments may bevaried, as will be obvious to those skilled in the art.

1. A method of manufacturing a semiconductor device (1) with asemiconductor body (2), in which method a doped region (3) is formed inthe semiconductor body (2), which semiconductor body (2) comprises acrystalline semiconducting surface region (4) of semiconductor material,while at least a portion of the crystalline semiconducting surfaceregion (4) is amorphized so as to form an amorphous surface layer (5),characterized in that the amorphization is carried out throughirradiation of the surface (6) with a radiation pulse (7) having awavelength whereby radiation of the radiation pulse is absorbed by thecrystalline surface region (4), and having energy flux whereby thecrystalline surface layer (5) is melted.
 2. A method as claimed in claim1, characterized in that, after the molten portion of the crystallinesemiconductor surface region (4) has solidified into an amorphoussurface layer (5) owing to cooling, dopant atoms (8) are provided in theamorphous surface layer (5) by means of ion implantation.
 3. A method asclaimed in claim 2, characterized in that, after the provision of thedopant atoms (8), the amorphous surface layer (5) is heated to atemperature at which the dopant atoms (8) are activated.
 4. A method asclaimed in claim 3, characterized in that the amorphous surface layer(5) is heated by rapid thermal annealing (RTA) to below the meltingtemperature of the amorphous semiconductor material, whereupon theamorphous surface layer (5) recrystallizes, and the dopant atoms (8) aresubstitutionally incorporated into lattice sites such that said dopantatoms (8) are activated.
 5. A method as claimed in claim 3,characterized in that the amorphous surface layer (5) is heated by laserannealing to above the melting temperature of the amorphoussemiconductor material, and the molten surface layer (5) is subsequentlycooled down to a temperature at which the molten surface layer (5)recrystallizes.
 6. A method as claimed in claim 1, characterized in thatthe radiation pulse (7) is provided by an excimer laser.
 7. A method asclaimed in claim 1, characterized in that the surface layer (5) melts toa depth (9) which is set by means of the pulse duration and the energydensity of the radiation pulse (7).
 8. A method as claimed in claim 7,characterized in that the pulse duration of the radiation pulse (7) isshorter than 1 ns.
 9. A method as claimed in claim 1, characterized inthat an absorption layer (10) for the wavelength of the radiation isprovided on the surface (6) before irradiation takes place.
 10. A methodas claimed in claim 1, wherein a MOSFET (11) is formed, characterized inthat the amorphous semiconducting surface layer (5) is used for forminga source (12) or a drain (13) of the MOSFET.
 11. A method as claimed inclaim 5, characterized in that the concentration of electricallyactivated dopant atoms is higher than the solid solubility limit.
 12. Asemiconductor device manufactured by the method recited in claim 1, amethod as claimed in any one of the preceding claims.